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AP9922EO Advanced Power Electronics Corp. Low on-resistance Capable of 2.5V gate drive Optimal DC/DC battery application D2 S2 G2 S2 N-CHANNEL ENHANCEMENT MODE POWER MOSFET BVDSS RDS(ON) S1 D1 G1 S1 20V 15m 6.8A TSSOP-8 ID Description The Advanced Power MOSFETs from APEC provide the designer with the best combination of fast switching, ruggedized device design, ultra low on-resistance and cost-effectiveness. D1 G1 G2 D2 S1 S2 Absolute Maximum Ratings Symbol VDS VGS ID@TA=25 ID@TA=70 IDM PD@TA=25 TSTG TJ Parameter Drain-Source Voltage Gate-Source Voltage Drain Current , VGS @ 4.5V Drain Current , VGS @ 4.5V Pulsed Drain Current 1 3 3 Rating 20 12 6.8 5.4 25 1 0.008 -55 to 150 -55 to 150 Units V V A A A W W/ Total Power Dissipation Linear Derating Factor Storage Temperature Range Operating Junction Temperature Range Thermal Data Symbol Rthj-a Parameter Thermal Resistance Junction-ambient 3 Value Max. 125 Unit /W Data and specifications subject to change without notice 200615052 AP9922EO Electrical Characteristics@Tj=25oC(unless otherwise specified) Symbol BVDSS BVDSS/Tj RDS(ON) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Rg Parameter Drain-Source Breakdown Voltage 2 Test Conditions VGS=0V, ID=250uA Min. 20 0.5 - Typ. 0.05 22 25 3 9 11 12 47 23 280 240 2.2 Max. Units 15 20 1.2 10 100 10 40 V V/ m m V S uA uA uA nC nC nC ns ns ns ns pF pF pF Breakdown Voltage Temperature Coefficient Reference to 25, ID=1mA Static Drain-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-Source Leakage Current (Tj=25 C) Drain-Source Leakage Current (Tj=70 C) o o VGS=4.5V, ID=6A VGS=2.5V, ID=4A VDS=VGS, ID=1mA VDS=4.5V, ID=6A VDS=20V, VGS=0V VDS=16V ,VGS=0V VGS=12V ID=6A VDS=16V VGS=4.5V VDS=15V ID=1A RG=3.3,VGS=4.5V RD=15 VGS=0V VDS=20V f=1.0MHz f=1.0MHz Gate-Source Leakage Total Gate Charge 2 Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance 2 1730 2770 Source-Drain Diode Symbol VSD Parameter Forward On Voltage 2 2 Test Conditions IS=0.84A,VGS=0V IS=6A, VGS=0V, dI/dt=100A/s Min. - Typ. 24 18 Max. Units 1.2 V ns nC trr Qrr Reverse Recovery Time Reverse Recovery Charge Notes: 1.Pulse width limited by Max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 2 3.Surface mounted on 1 in copper pad of FR4 board ; 208/W when mounted on Min. copper pad. AP9922EO 50 50 T A =25 o C 40 ID , Drain Current (A) ID , Drain Current (A) 5.0V 4.5V 3.5V 2.5V o T A = 150 C 40 5.0V 4.5V 3.5V 2.5V 30 30 V G =1.8V 20 V G =1.8V 20 10 10 0 0 1 1 2 2 3 0 0 1 1 2 2 3 V DS , Drain-to-Source Voltage (V) V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 35 1.6 30 ID=4A T A =25 1.4 ID=6A V G = 4.5 V Normalized R DS(ON) RDS(ON) (m ) 25 1.2 20 1.0 15 0.8 10 0.6 0 2 4 6 8 10 12 -50 0 50 100 150 V GS , Gate-to-Source Voltage (V) T j , Junction Temperature ( C) o Fig 3. On-Resistance v.s. Gate Voltage Fig 4. Normalized On-Resistance v.s. Junction Temperature 2.0 6 5 1.5 4 3 Normalized VGS(th) (V) 1 IS(A) 1.0 2 T j =150 o C T j =25 o C 0.5 1 0 0 0.2 0.4 0.6 0.8 0.0 -50 0 50 100 150 V SD , Source-to-Drain Voltage (V) T j , Junction Temperature ( o C) Fig 5. Forward Characteristic of Reverse Diode Fig 6. Gate Threshold Voltage v.s. Junction Temperature AP9922EO f=1.0MHz 12 10000 ID=6A VGS , Gate to Source Voltage (V) 9 V DS = 10 V V DS = 12 V V DS = 16 V C (pF) 1000 C iss 6 3 C oss C rss 0 0 10 20 30 40 50 60 100 1 5 9 13 17 21 25 Q G , Total Gate Charge (nC) V DS , Drain-to-Source Voltage (V) Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics 100 1 Duty factor=0.5 Normalized Thermal Response (Rthja) 0.2 10 100us 1ms 10ms 0.1 0.1 0.05 ID (A) 1 0.02 100ms 1s 0.1 0.01 PDM 0.01 Single Pulse t T Duty factor = t/T Peak Tj = PDM x Rthja + Ta Rthja=208/W T A =25 o C Single Pulse 0.01 0.1 1 10 DC 0.001 0.0001 100 0.0010 0.0100 0.1000 1.0000 10.0000 100.0000 V DS , Drain-to-Source Voltage (V) t , Pulse Width (s) Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance VDS 90% VG QG 4.5V QGS QGD 10% VGS td(on) tr td(off) tf Charge Q Fig 11. Switching Time Waveform Fig 12. Gate Charge Waveform |
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